Mdthbs

I am trying to understand the design principles of Class A amplifiers, primarily for audio purposes.

I have read several times that "the voltage drop across the emitter resistor should be in the region of 1 to 2 volts"...

To me this seems like a backwards way to design an amplifier, and it confused me. Why would one specify this voltage drop before anything else? Surely the voltage drop should be calculated from the current flow through the amplifier? (This is what I was thinking until today.)

Then I had a thought - I believe that the transistor will have a parasitic resistance which (for some reason that I do not yet understand) appears as if it were a small resistor connected in series at the emitter.

This resistor will create some voltage drop - so my thoughts are that perhaps this voltage drop (for some reason that I also do not yet understand) is always much less than 1 to 2 volts? At least this is my guess, I have no idea if I am along the right lines here.

To make this concrete with an example, please see the following webpage:

https://www.electronics-tutorials.ws/amplifier/input-impedance-of-an-amplifier.html

Under Single Stage Common Emitter Amplifier the author states,

Firstly lets start by making a few simple assumptions about the single stage common emitter amplifier circuit above to define the operating point of the transistor. The voltage drop across the the Emitter resistor, VRE = 1.5V, the quiescent current, IQ = 1mA

My question here is, why was this value, of 1.5V for VRE, chosen first, and why was it chosen to be this value?

Further to this, the author states that IQ = 1mA. Does this mean that the output current from this type of amplifier must be between 0 and a maximum of 2mA? (My understanding is that the quiescent current is half the maximum output current. Is that correct?)

The main reason that the 1.5V emitter voltage design point is chosen is to reduce the effect of temperature variations and device variations on the bias current.

The voltage across the base-emitter junction will change by about 2mV per degree C. Since the voltage at the base is assumed constant the voltage across the emitter resistor will increase by 2mV/deg resulting in a current increase. Over a range of say 50deg this could result in 100mV change. By selecting a voltage across the resistor that is large relative to the 100mV the current change will be minimized.

Notice that the 1.5k emitter resistor has a 27uF capacitor across it. This bypassing means that the presence of the resistor does not need to be included in the calculation of AC gain as at 1kHz it has an impedance of ~6ohms.

The AC gain can be calculated by multiplying the gm and the effective output impedance which is 5k//1k = 833 ohms.

The effective gm is 1/re. The effective emitter resistance 1ma/40 = 25 ohm giving a gm of 40ma/V. The AC gain is therefore 40/1000 * 833 = 33.

Personally, I think that 1.5V across the emitter resistor is being excessively conservative and for normal temperatures, something less would be acceptable.

Also, this circuit arrangement is rarely used these days even when designing discrete circuits and one that uses two or more transistors with DC feedback is more common.

This type of arrangement was used in the early days of transistors when they were much more expensive with very inferior characteristics compared to modern types (modern being within the last 40 years!). It is, however, a good example circuit for demonstrating the principles.

I believe this is the circuit you are talking about


In order to get the maximum possible output voltage excursion at the collector without clipping, the transistor needs to be biased so that the quiescent collector voltage Vc is approximately half way between Vcc and Vre.

The design has to start somewhere and Iq of 1mA is chosen in this example as a reasonable value.

You can either start with Rc and work out the necessary Re or, as in the article, calculate Re and work back to Rc. Whichever method you chose Re establishes the quiescent Ie (=Iq) once you have set Vb by means of R1 and R2.

So therefore it is easier to start with Re.

Vre needs to be sufficiently large that the range of values for Vbe do not significantly change Ie. In the article Vbe is taken as 0.7V, but there will always be variation from transistor to transistor and it is temperature sensitive. Let us say, for the sake of argument that Vbe could be between 0.65V and 0.75V. Vb is set at 2.2V by R1 and R2 and therefore Vre could be anywhere between 1.55V and 1.45V hence Ie could be 1.03mA and 0.97mA which, in turn sets Vc between 4.85V and 5.15V which is OK.

Having set Ie at a nominal 1mA the rest of the calculations proceed as in the article.

If you make Re significantly larger you will increase Vre and hence reduce the maximum excursion possible at the collector, so that is undesirable.

On the other hand if you try to reduce Re to, say, 150R (adjusting R1 and R2 to maintain Ie at nominally 1mA) Vre will be nominally only 0.15V, Vb will be 0.15+0.7 = 0.85V, but now, with the possible variation in Vbe, Vre could range from 0.2V to 0.1V giving a variation in Ie of 0.7mA to 1.3mA and hence Vc could be between 3.5V and 6.5V both of which would restrict the output voltage swing without clipping.

So essentially the design is a compromise between achieving the maximum possible output voltage excursion whilst using any transistor within spec. And having set Ie (Iq) it is easier to start with Re rather than some other component.

I'm not quite sure what you mean by your second question. With no load Ic will vary from 0 to just under 2mA when driven to its full excursion.

An actual design will usually be forced to balance various constraints. And it isn't always the case that you can follow only one recipe all the time. Often enough, you start out with some assumptions you feel are better and then find some reason why you can't go that way and you have to go re-assess your assumptions and make different trade-off choices. So some mental flexibility may be very important.

(If interested, look over what I recently wrote about a two-stage design. You will see detours and changes of assumptions made in order to get to the end-point.)

But let's get to your questions, directly:

My question here is, why was this value, of 1.5V for VRE, chosen
first, and why was it chosen to be this value?

As has already been said here, ambient (and operating) temperatures can vary. The base-emitter voltage ($V_text{BE}$) varies somewhere between $-1.8:frac{text{mV}}{^circ C}$ and $-2.4:frac{text{mV}}{^circ C}$. So if the device is operated in a different climate, for example, then the operating point might move a lot. This might drive the BJT into saturation or clipping (and it will cease to perform as it should.)

But also each part varies, too. If you pulled and tested 100 adjacent BJTs from the same reel, at low enough currents that the Ohmic base and emitter resistances weren't much of an issue, you might see a spread of $20:text{mV}$ (or $pm 10:text{mV}$) for the $V_text{BE}$ across the group. And that's an exceptional situation. If you look at parts across different part manufacturers and at different times, it would be twice that much or more.

Also, in some cases where the collector current ($I_text{C}$) can reach high enough values, variations in the Ohmic base, emitter, and collector resistances can then account momentarily for almost half of the $V_text{BE}$! If so, this must be managed somehow.

Finally, and this is very very important to remember, the collector current is an exponential function of $V_text{BE}$. So it doesn't take much of a difference in part variations, climate, etc., to radically change the operating point of your circuit. And I mean radically. If you don't do something to manage this problem, you are almost certainly going to find your circuit in trouble in some situation or instance.

As a general guide, I think it is reasonable to plan for a spread of about $100:text{mV}$ (or $pm 50:text{mV}$) when performing a design.

Adding an emitter resistor turns the BJT into an emitter-follower, where the voltage drop across the emitter resistor sets the collector current. This, instead of an exponential function of $V_text{BE}$. As an emitter-follower, variations in $V_text{BE}$ will lead to slight variations (if designed well) across the emitter resistor and will move the operating point. But only a little. And the more voltage you can sacrifice to the emitter resistor's voltage drop, the less effect the $pm 50:text{mV}$ variation will have on the collector current and therefore the operating point.

Further to this, the author states that IQ = 1mA. Does this mean that
the output current from this type of amplifier must be between 0 and a
maximum of 2mA? (My understanding is that the quiescent current is
half the maximum output current. Is that correct?)

The choice of the quiescent current is often one of the starting points. But it isn't necessarily the only one. The design parameters will have something to say about it. In some cases, you are given a power supply and told the output impedance you need to support and the choice falls out of that. Or the BJT you intend on using will perform better at some designed collector current and you'll use that fact to make a choice.

No. If $I_text{Q}=1:text{mA}$, that does not necessarily mean that the circuit can operate between $I_text{C}=0:text{mA}$ and $I_text{C}=2:text{mA}$. In almost no cases do you ever want to allow $I_text{C}=0:text{mA}$ , for example. This will mean terrible distortion in the output signal. So that's not an option. Also, it's quite possible that going to $I_text{C}=2:text{mA}$ will move the circuit into saturation. So there's no hard and fast rule here.

You need to leave room for the BJT to stay out of saturation. This usually means that $mid, V_text{CE}mid: ge2:text{V}$ in all cases, though you can sometimes (in tighter circumstances) cut that in half. You also need to leave room for the quiescent emitter voltage to be high enough above (or below) its rail that you manage the thermal issues mentioned already and also so that with the signal applied the emitter voltage doesn't drive into its rail (bad news, then.)

So there are lots of considerations.

Your understanding of the Rbe is correct and the emitter R increases Rin to Re*hFE and thus reduces the exponential input voltage effects by making the input impedance more constant.

With V(Re) = 1.5V this reduces the nonlinear transformation of input voltage to emitter current and thus reduces sine distortion significantly. But is overkill for a 12V supply with high gain. It’s a poor choice. It only needs to be greater than your Vin pp signal with some margin. In my final example with collector feedback for self-bias, the emitter voltage is very low (30mV) with high gain (70) and very linear!!

e.g. My Sim using Falstad site

Re also reduces the gain which is increased when approaching Rbe <50 Ohms @ 1mA and may be neglected if Re =1k. Rbe is controlled by base current. Voltage gain becomes Rc/Re and Vce is biased to mid-scale for large swings by the base voltage-controlled emitter current.

However, if you look at the schematic in your link labelled “Single Stage Common Emitter Amplifier” you will see a design flaw where the collector R is 5k and the load is AC coupled to 1k. When this is smaller, (1/5) all of the DC current bias when modulated by the input can be coupled to the 1k load with only 1/6th the voltage, so the gain reduces horribly and gets collector can get starved of current. Proof of gain reduction

So remember to never load the collector with a smaller R than Rc when AC coupled.

They teach the simple H bias Class A Amp. then you learn all the imperfections and evolution of design. Then learn how to improve distortion and DC bias stability with negative feedback ratios. So you never actually use H bias unless desperate..