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How to write exactly bash scripts into Makefiles?


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.everyoneloves__top-leaderboard:empty,.everyoneloves__mid-leaderboard:empty,.everyoneloves__bot-mid-leaderboard:empty{ margin-bottom:0;
}







5















I love to type bash scripts, but if I prepare multiple tools, project's root directory is filled with so many shell scripts. That's why I prefer using Makefile.



Makefile is good. However I want to build my makefiles just as regular bash scripts.



Eg:



Think that I wrote a bash script very quickly with the following content:



#!/bin/bash
echo "hello"
cd ~
do-some-work.sh my-parameter


I can run this script with $ ./my-important-task.sh.



If I wanted to move that script into makefile, I should do the following:



SHELL := /bin/bash 

my-important-task:
echo "hello" ;
cd ~ ;
do-some-work.sh my-parameter


but I want the following:



my-important-task: 
[[copy and paste the my-important-task.sh file]]


Is there anyway to accomplish this goal?










share|improve this question































    5















    I love to type bash scripts, but if I prepare multiple tools, project's root directory is filled with so many shell scripts. That's why I prefer using Makefile.



    Makefile is good. However I want to build my makefiles just as regular bash scripts.



    Eg:



    Think that I wrote a bash script very quickly with the following content:



    #!/bin/bash
    echo "hello"
    cd ~
    do-some-work.sh my-parameter


    I can run this script with $ ./my-important-task.sh.



    If I wanted to move that script into makefile, I should do the following:



    SHELL := /bin/bash 

    my-important-task:
    echo "hello" ;
    cd ~ ;
    do-some-work.sh my-parameter


    but I want the following:



    my-important-task: 
    [[copy and paste the my-important-task.sh file]]


    Is there anyway to accomplish this goal?










    share|improve this question



























      5












      5








      5


      3






      I love to type bash scripts, but if I prepare multiple tools, project's root directory is filled with so many shell scripts. That's why I prefer using Makefile.



      Makefile is good. However I want to build my makefiles just as regular bash scripts.



      Eg:



      Think that I wrote a bash script very quickly with the following content:



      #!/bin/bash
      echo "hello"
      cd ~
      do-some-work.sh my-parameter


      I can run this script with $ ./my-important-task.sh.



      If I wanted to move that script into makefile, I should do the following:



      SHELL := /bin/bash 

      my-important-task:
      echo "hello" ;
      cd ~ ;
      do-some-work.sh my-parameter


      but I want the following:



      my-important-task: 
      [[copy and paste the my-important-task.sh file]]


      Is there anyway to accomplish this goal?










      share|improve this question
















      I love to type bash scripts, but if I prepare multiple tools, project's root directory is filled with so many shell scripts. That's why I prefer using Makefile.



      Makefile is good. However I want to build my makefiles just as regular bash scripts.



      Eg:



      Think that I wrote a bash script very quickly with the following content:



      #!/bin/bash
      echo "hello"
      cd ~
      do-some-work.sh my-parameter


      I can run this script with $ ./my-important-task.sh.



      If I wanted to move that script into makefile, I should do the following:



      SHELL := /bin/bash 

      my-important-task:
      echo "hello" ;
      cd ~ ;
      do-some-work.sh my-parameter


      but I want the following:



      my-important-task: 
      [[copy and paste the my-important-task.sh file]]


      Is there anyway to accomplish this goal?







      bash make






      share|improve this question















      share|improve this question













      share|improve this question




      share|improve this question








      edited 27 mins ago







      ceremcem

















      asked Mar 18 '16 at 20:59









      ceremcemceremcem

      5841624




      5841624






















          4 Answers
          4






          active

          oldest

          votes


















          12














          If you really want to “write exactly bash scripts into Makefiles” then you'll need to do it a bit indirectly. If you just paste the script after the target line, then you'll run into two problems that just cannot be bypassed: the command lines need to be indented with a tab, and dollar signs need to be escaped.



          If you use GNU make (as opposed to BSD make, Solaris make, etc.), then you can define your script as a variable using the multi-line definition syntax, and then use the value function to use the raw value of the variable, bypassing expansion.



          In addition, as explained by skwllsp, you need to tell make to execute the command list for each target as a single shell script rather than line by line, which you can do in GNU make by defining a .ONESHELL target.



          define my_important_task =
          # script goes here
          endef

          my-important-task: ; $(value my_important_task)

          .ONESHELL:





          share|improve this answer


























          • Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

            – ceremcem
            Mar 19 '16 at 0:37






          • 1





            @ceremcem You need .ONESHELL as well.

            – Gilles
            Mar 19 '16 at 11:34



















          5














          https://www.gnu.org/software/make/manual/html_node/One-Shell.html




          If the .ONESHELL special target appears anywhere in the makefile then
          all recipe lines for each target will be provided to a single
          invocation of the shell.




          You will still need to put a tab character at the beginning of each line, and to double all dollar signs (i.e. replace $ by $$ everywhere in the script).






          share|improve this answer


























          • it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

            – ceremcem
            Mar 18 '16 at 21:53











          • @ceremcem You need to escape the dollar signs.

            – Gilles
            Mar 18 '16 at 22:23











          • It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

            – ceremcem
            Mar 19 '16 at 1:03













          • @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

            – Sergei Kurenkov
            Mar 19 '16 at 10:15











          • @Gilles I use GNU Make 4.1

            – ceremcem
            Mar 19 '16 at 10:34





















          5














          If the problem is that your top-level project directory is cluttered with dozens of scripts, then the obvious solution is to create a subdirectory (e.g. called scripts) to put them in.



          Run them as ./scripts/scriptname and/or add the scripts directory to your PATH.



          If you still want a Makefile to run them with, just create Makefile entries that run ./scripts/scriptname for those targets. e.g.



          my-important-task: 
          ./scripts/my-important-task.sh my-parameter


          NOTE: If the scripts in ./scripts call other scripts in the same directory, they'll need to either specify the full path to the script, or have the scripts directory in the PATH.






          share|improve this answer
























          • Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

            – ceremcem
            Mar 19 '16 at 10:49











          • somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

            – cas
            Mar 19 '16 at 11:33



















          0














          Why don't you use aliases and functions defined in your .bashrc (and possibly .bash_alaiases`)?





          share
























            Your Answer








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            4 Answers
            4






            active

            oldest

            votes








            4 Answers
            4






            active

            oldest

            votes









            active

            oldest

            votes






            active

            oldest

            votes









            12














            If you really want to “write exactly bash scripts into Makefiles” then you'll need to do it a bit indirectly. If you just paste the script after the target line, then you'll run into two problems that just cannot be bypassed: the command lines need to be indented with a tab, and dollar signs need to be escaped.



            If you use GNU make (as opposed to BSD make, Solaris make, etc.), then you can define your script as a variable using the multi-line definition syntax, and then use the value function to use the raw value of the variable, bypassing expansion.



            In addition, as explained by skwllsp, you need to tell make to execute the command list for each target as a single shell script rather than line by line, which you can do in GNU make by defining a .ONESHELL target.



            define my_important_task =
            # script goes here
            endef

            my-important-task: ; $(value my_important_task)

            .ONESHELL:





            share|improve this answer


























            • Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

              – ceremcem
              Mar 19 '16 at 0:37






            • 1





              @ceremcem You need .ONESHELL as well.

              – Gilles
              Mar 19 '16 at 11:34
















            12














            If you really want to “write exactly bash scripts into Makefiles” then you'll need to do it a bit indirectly. If you just paste the script after the target line, then you'll run into two problems that just cannot be bypassed: the command lines need to be indented with a tab, and dollar signs need to be escaped.



            If you use GNU make (as opposed to BSD make, Solaris make, etc.), then you can define your script as a variable using the multi-line definition syntax, and then use the value function to use the raw value of the variable, bypassing expansion.



            In addition, as explained by skwllsp, you need to tell make to execute the command list for each target as a single shell script rather than line by line, which you can do in GNU make by defining a .ONESHELL target.



            define my_important_task =
            # script goes here
            endef

            my-important-task: ; $(value my_important_task)

            .ONESHELL:





            share|improve this answer


























            • Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

              – ceremcem
              Mar 19 '16 at 0:37






            • 1





              @ceremcem You need .ONESHELL as well.

              – Gilles
              Mar 19 '16 at 11:34














            12












            12








            12







            If you really want to “write exactly bash scripts into Makefiles” then you'll need to do it a bit indirectly. If you just paste the script after the target line, then you'll run into two problems that just cannot be bypassed: the command lines need to be indented with a tab, and dollar signs need to be escaped.



            If you use GNU make (as opposed to BSD make, Solaris make, etc.), then you can define your script as a variable using the multi-line definition syntax, and then use the value function to use the raw value of the variable, bypassing expansion.



            In addition, as explained by skwllsp, you need to tell make to execute the command list for each target as a single shell script rather than line by line, which you can do in GNU make by defining a .ONESHELL target.



            define my_important_task =
            # script goes here
            endef

            my-important-task: ; $(value my_important_task)

            .ONESHELL:





            share|improve this answer















            If you really want to “write exactly bash scripts into Makefiles” then you'll need to do it a bit indirectly. If you just paste the script after the target line, then you'll run into two problems that just cannot be bypassed: the command lines need to be indented with a tab, and dollar signs need to be escaped.



            If you use GNU make (as opposed to BSD make, Solaris make, etc.), then you can define your script as a variable using the multi-line definition syntax, and then use the value function to use the raw value of the variable, bypassing expansion.



            In addition, as explained by skwllsp, you need to tell make to execute the command list for each target as a single shell script rather than line by line, which you can do in GNU make by defining a .ONESHELL target.



            define my_important_task =
            # script goes here
            endef

            my-important-task: ; $(value my_important_task)

            .ONESHELL:






            share|improve this answer














            share|improve this answer



            share|improve this answer








            edited Apr 13 '17 at 12:36









            Community

            1




            1










            answered Mar 18 '16 at 22:29









            GillesGilles

            559k13411521657




            559k13411521657













            • Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

              – ceremcem
              Mar 19 '16 at 0:37






            • 1





              @ceremcem You need .ONESHELL as well.

              – Gilles
              Mar 19 '16 at 11:34



















            • Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

              – ceremcem
              Mar 19 '16 at 0:37






            • 1





              @ceremcem You need .ONESHELL as well.

              – Gilles
              Mar 19 '16 at 11:34

















            Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

            – ceremcem
            Mar 19 '16 at 0:37





            Would you mind taking a look at this file: gist.github.com/ceremcem/a380bb92cbd03c34aba5

            – ceremcem
            Mar 19 '16 at 0:37




            1




            1





            @ceremcem You need .ONESHELL as well.

            – Gilles
            Mar 19 '16 at 11:34





            @ceremcem You need .ONESHELL as well.

            – Gilles
            Mar 19 '16 at 11:34













            5














            https://www.gnu.org/software/make/manual/html_node/One-Shell.html




            If the .ONESHELL special target appears anywhere in the makefile then
            all recipe lines for each target will be provided to a single
            invocation of the shell.




            You will still need to put a tab character at the beginning of each line, and to double all dollar signs (i.e. replace $ by $$ everywhere in the script).






            share|improve this answer


























            • it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

              – ceremcem
              Mar 18 '16 at 21:53











            • @ceremcem You need to escape the dollar signs.

              – Gilles
              Mar 18 '16 at 22:23











            • It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

              – ceremcem
              Mar 19 '16 at 1:03













            • @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

              – Sergei Kurenkov
              Mar 19 '16 at 10:15











            • @Gilles I use GNU Make 4.1

              – ceremcem
              Mar 19 '16 at 10:34


















            5














            https://www.gnu.org/software/make/manual/html_node/One-Shell.html




            If the .ONESHELL special target appears anywhere in the makefile then
            all recipe lines for each target will be provided to a single
            invocation of the shell.




            You will still need to put a tab character at the beginning of each line, and to double all dollar signs (i.e. replace $ by $$ everywhere in the script).






            share|improve this answer


























            • it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

              – ceremcem
              Mar 18 '16 at 21:53











            • @ceremcem You need to escape the dollar signs.

              – Gilles
              Mar 18 '16 at 22:23











            • It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

              – ceremcem
              Mar 19 '16 at 1:03













            • @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

              – Sergei Kurenkov
              Mar 19 '16 at 10:15











            • @Gilles I use GNU Make 4.1

              – ceremcem
              Mar 19 '16 at 10:34
















            5












            5








            5







            https://www.gnu.org/software/make/manual/html_node/One-Shell.html




            If the .ONESHELL special target appears anywhere in the makefile then
            all recipe lines for each target will be provided to a single
            invocation of the shell.




            You will still need to put a tab character at the beginning of each line, and to double all dollar signs (i.e. replace $ by $$ everywhere in the script).






            share|improve this answer















            https://www.gnu.org/software/make/manual/html_node/One-Shell.html




            If the .ONESHELL special target appears anywhere in the makefile then
            all recipe lines for each target will be provided to a single
            invocation of the shell.




            You will still need to put a tab character at the beginning of each line, and to double all dollar signs (i.e. replace $ by $$ everywhere in the script).







            share|improve this answer














            share|improve this answer



            share|improve this answer








            edited Mar 18 '16 at 22:22









            Gilles

            559k13411521657




            559k13411521657










            answered Mar 18 '16 at 21:09









            Sergei KurenkovSergei Kurenkov

            2,1541218




            2,1541218













            • it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

              – ceremcem
              Mar 18 '16 at 21:53











            • @ceremcem You need to escape the dollar signs.

              – Gilles
              Mar 18 '16 at 22:23











            • It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

              – ceremcem
              Mar 19 '16 at 1:03













            • @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

              – Sergei Kurenkov
              Mar 19 '16 at 10:15











            • @Gilles I use GNU Make 4.1

              – ceremcem
              Mar 19 '16 at 10:34





















            • it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

              – ceremcem
              Mar 18 '16 at 21:53











            • @ceremcem You need to escape the dollar signs.

              – Gilles
              Mar 18 '16 at 22:23











            • It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

              – ceremcem
              Mar 19 '16 at 1:03













            • @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

              – Sergei Kurenkov
              Mar 19 '16 at 10:15











            • @Gilles I use GNU Make 4.1

              – ceremcem
              Mar 19 '16 at 10:34



















            it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

            – ceremcem
            Mar 18 '16 at 21:53





            it's almost what I'm looking for. would you mind helping me debug the following test code which doesn't work as is: gist.github.com/ceremcem/9b6e8e90928ff4afc569

            – ceremcem
            Mar 18 '16 at 21:53













            @ceremcem You need to escape the dollar signs.

            – Gilles
            Mar 18 '16 at 22:23





            @ceremcem You need to escape the dollar signs.

            – Gilles
            Mar 18 '16 at 22:23













            It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

            – ceremcem
            Mar 19 '16 at 1:03







            It still produces an error: make: /bin/bash : Command not found Makefile:5: recipe for target 'test' failed make: *** [test] Error 127

            – ceremcem
            Mar 19 '16 at 1:03















            @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

            – Sergei Kurenkov
            Mar 19 '16 at 10:15





            @ceremcem, what make version do you use? See this: stackoverflow.com/questions/32153034/…

            – Sergei Kurenkov
            Mar 19 '16 at 10:15













            @Gilles I use GNU Make 4.1

            – ceremcem
            Mar 19 '16 at 10:34







            @Gilles I use GNU Make 4.1

            – ceremcem
            Mar 19 '16 at 10:34













            5














            If the problem is that your top-level project directory is cluttered with dozens of scripts, then the obvious solution is to create a subdirectory (e.g. called scripts) to put them in.



            Run them as ./scripts/scriptname and/or add the scripts directory to your PATH.



            If you still want a Makefile to run them with, just create Makefile entries that run ./scripts/scriptname for those targets. e.g.



            my-important-task: 
            ./scripts/my-important-task.sh my-parameter


            NOTE: If the scripts in ./scripts call other scripts in the same directory, they'll need to either specify the full path to the script, or have the scripts directory in the PATH.






            share|improve this answer
























            • Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

              – ceremcem
              Mar 19 '16 at 10:49











            • somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

              – cas
              Mar 19 '16 at 11:33
















            5














            If the problem is that your top-level project directory is cluttered with dozens of scripts, then the obvious solution is to create a subdirectory (e.g. called scripts) to put them in.



            Run them as ./scripts/scriptname and/or add the scripts directory to your PATH.



            If you still want a Makefile to run them with, just create Makefile entries that run ./scripts/scriptname for those targets. e.g.



            my-important-task: 
            ./scripts/my-important-task.sh my-parameter


            NOTE: If the scripts in ./scripts call other scripts in the same directory, they'll need to either specify the full path to the script, or have the scripts directory in the PATH.






            share|improve this answer
























            • Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

              – ceremcem
              Mar 19 '16 at 10:49











            • somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

              – cas
              Mar 19 '16 at 11:33














            5












            5








            5







            If the problem is that your top-level project directory is cluttered with dozens of scripts, then the obvious solution is to create a subdirectory (e.g. called scripts) to put them in.



            Run them as ./scripts/scriptname and/or add the scripts directory to your PATH.



            If you still want a Makefile to run them with, just create Makefile entries that run ./scripts/scriptname for those targets. e.g.



            my-important-task: 
            ./scripts/my-important-task.sh my-parameter


            NOTE: If the scripts in ./scripts call other scripts in the same directory, they'll need to either specify the full path to the script, or have the scripts directory in the PATH.






            share|improve this answer













            If the problem is that your top-level project directory is cluttered with dozens of scripts, then the obvious solution is to create a subdirectory (e.g. called scripts) to put them in.



            Run them as ./scripts/scriptname and/or add the scripts directory to your PATH.



            If you still want a Makefile to run them with, just create Makefile entries that run ./scripts/scriptname for those targets. e.g.



            my-important-task: 
            ./scripts/my-important-task.sh my-parameter


            NOTE: If the scripts in ./scripts call other scripts in the same directory, they'll need to either specify the full path to the script, or have the scripts directory in the PATH.







            share|improve this answer












            share|improve this answer



            share|improve this answer










            answered Mar 19 '16 at 1:35









            cascas

            40.2k457107




            40.2k457107













            • Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

              – ceremcem
              Mar 19 '16 at 10:49











            • somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

              – cas
              Mar 19 '16 at 11:33



















            • Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

              – ceremcem
              Mar 19 '16 at 10:49











            • somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

              – cas
              Mar 19 '16 at 11:33

















            Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

            – ceremcem
            Mar 19 '16 at 10:49





            Maybe that would be an appropriate solution. But writing down in a single file would make things speed up in most cases. We were talking about a proposal yesterday though...

            – ceremcem
            Mar 19 '16 at 10:49













            somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

            – cas
            Mar 19 '16 at 11:33





            somehow i doubt very much that having make parse a Makefile, search for a target, and then fork a shell to run some shell commands could possibly be faster than just running a shell script. not that the startup speed of make plus a bunch of shell commands or a shell script is at all significant on any modern-ish machine (say, less than 20 years old) unless run thousands of times in a loop.

            – cas
            Mar 19 '16 at 11:33











            0














            Why don't you use aliases and functions defined in your .bashrc (and possibly .bash_alaiases`)?





            share




























              0














              Why don't you use aliases and functions defined in your .bashrc (and possibly .bash_alaiases`)?





              share


























                0












                0








                0







                Why don't you use aliases and functions defined in your .bashrc (and possibly .bash_alaiases`)?





                share













                Why don't you use aliases and functions defined in your .bashrc (and possibly .bash_alaiases`)?






                share











                share


                share










                answered 4 mins ago









                xenoidxenoid

                3,5091928




                3,5091928






























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